Publicado el 16/04/2015
IEEE AR EMCS - Conferencia ‘Demystifying Signal Integrity in High-Speed Designs’
Dr. Ram Achar, IEEE Fellow - 8 de mayo de 2015, en FIUBA, CABA
IEEE AR EMCS - Conferencia ‘Demystifying Signal Integrity in High-Speed Designs’
El viernes 8 de mayo de 2015 a las 17:00, en la Sala de Videoteca de la Facultad de Ingeniería de la Universidad de Buenos Aires (FIUBA). Av. Paseo Colón 850, 3er. piso, CABA, se llevará a cabo la Conferencia del Dr. Ram Achar, IEEE Fellow y Disertante Distinguido de la IEEE ElectroMagnetic Compatibility Society (EMCS) sobre ‘Demystifying Signal Integrity in High-Speed Designs’
Inscripción
La actividad es libre y gratuita y los interesados pueden inscribirse a través de este link:
Resumen
Demystifying Signal Integrity in High-Speed Designs
With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems.
These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes.
If not considered during the design stage, signal integrity effects can cause failed designs. Since extra iterations in the design cycle are costly, accurate prediction of these effects is a necessity in high-speed designs.
Consequently, preserving signal integrity has become one of the most challenging tasks facing designers of modern multifunction and miniature electronic circuits and systems.
This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: issues/ modeling/ analysis in high-speed designs.
Biografía
Prof. Ramachandra (Ram) Achar, Ph. D., P. Eng., IEEE Fellow
Professor, Department of Electronics
Carleton University, Ottawa, Ontario - K1S 5B6
http://www.doe.carleton.ca/~achar